SoC FPGAs dramatically improve system performance Reduce power and cost and board area
The company released its ARM-based SoC family on December 12, integrating 28-nm Cyclone V and Arria V architectures, dual-core ARM Cortex-A9 MPCore processors, error-correcting code (ECC) protected memory controllers in a single chip. Peripherals and broadband interconnections. These SoCs inherit ARM's rich software development tools, debuggers, operating systems, middleware, and applications. Users can take advantage of the SoC FPGA development process to quickly build customizable ARM-based systems that reduce board space, power and cost in embedded systems in a variety of industries, while improving performance in these industries, including automotive and industrial , video surveillance, wireless infrastructure, computers and storage.
Jim Nicholas, vice president of the ARM processor division, commented: "SoC FPGAs based on 28nm process technology represent a new development in embedded systems in terms of performance and functionality. These devices can greatly help embedded system designers reduce time-to-market Reduce costs and improve energy efficiency, while also fully utilizing the support of ARM software-assisted systems."
Cyclone V and Arria V SoC FPGA processor systems feature dual-core 800 MHz ARM Cortex-A9 MPCore processors with media processing engine, single/double precision floating point units, L1 and L2 caches, ECC protected memory control , ECC protected scratchpad memory, and a variety of commonly used peripherals. The processor system has a peak performance of 4,000 D and consumes less than 1.8 watts. The processor system and FPGA fabric are powered independently and can be configured and started in any order. Once you are working, you can turn off the FPGA section as needed to reduce system power consumption.
The ARM Cortex-A9 MPCore processor system and FPGA are interconnected through a large throughput data path with peak bandwidths exceeding 125-Gbps and good data continuity. This level of performance is not possible with two chips. The integrated single-chip SoC FPGA support board designer eliminates the need for an external IO path between the processor and the FPGA, significantly reducing system power consumption.
Altera's SoC FPGA Family
Altera's SoC FPGA family leverages its 28-nm family of products to innovate in a number of ways to meet user power, performance and cost requirements, including process technology, transceiver technology, IO resources and hard core IP. The introduction of Cyclone V and Arria V SoC FPGAs extends this family of products to the embedded processing market.
Cyclone V and Arria V SoC FPGAs are based on a low power 28-nm process (28LP). These series have embedded transceivers that operate at 5-Gbps and 10-Gbps, respectively. The FPGA architecture includes an adjustable-precision DSP block and three ECC-protected memory controllers. Altera's Cyclone V SoC FPGAs feature logic elements (LEs) that are the industry's lowest power and cost, and are designed for high-volume applications, including next-generation silicon industrial drivers, advanced driver assistance, and video surveillance. For mid-range applications, Arria V SoC FPGAs are balanced in cost and performance with the lowest total power consumption. The device has LEs for applications that require high performance, including remote RF front ends, LTE base stations, and multifunction printers.
SoC FPGA development environment
Altera's SoC FPGAs also support the hardware and software teams to improve the team's performance with common tools and development processes that support the Cortex-A9 MPCore processor and FPGA. Designers can use Altera's Quartus II software to develop custom peripherals and hardware accelerators that integrate with the processor system using Altera's Qsys system integration tool. Qsys automatically generates interconnect logic that connects intellectual property (IP) functions and subsystems to accelerate the hardware design process. Qsys automatically generates FPGA-optimized chip network (NoC) interconnects, improves performance, enhances design reuse, and verifies more quickly. Qsys supports industry-standard interfaces, including Avalon memory maps, Avalon streams, and ARM's AMBA AXI, enabling users to leverage or reuse IP cores and multiple interfaces in a single design. SoC FPGAs are based on the standard ARM Cortex-A9 MPCore processor, so they are compatible with existing ARM software-assisted systems. SoC FPGA-based system software development can begin immediately on Altera's SoC FPGA virtual targets. (Please refer to Altera's release today: "Altera Releases the FPGA Industry's First SoC FPGA Software Development Virtual Target.")
Vince Hu, vice president of product and enterprise marketing at Altera, commented: "With integrated high-performance processing systems, low-power 28-nm FPGA architecture, hardware software development processes, and virtual target development platforms, Altera has set new standards in SoC technology. As part of Altera's embedded initiative, SoC FPGAs help embedded developers dramatically improve system performance, reduce power and cost, and board space."