Design and Implementation of Interface Circuit Based on VXI Bus

With the development of modern wireless communication systems, communication systems such as mobile communication, radar, and satellite communication have higher requirements on the switching speed, power capacity, and integration of the transceiver switch. Therefore, research on VXI bus technology and development meets the military. The VXI bus module with special requirements is of great significance. We will use the virtual instrument idea to implement the hardware circuit in software. The RF switch designed below can be directly controlled by the computer, which can be easily connected with the VXI bus test system. Integration, to maximize the use of computer and microelectronics technology in today's testing field, has broad prospects for development.

1 VXI bus interface circuit design and implementation

VXIbus is an extension of VMEbus in the field of instruments and is a computerized modular automatic instrument system. It relies on effective standardization and modularization to achieve serialization, generalization and interchangeability and interoperability of VXIbus instruments. Its open architecture and Plug&Play approach fully meet the requirements of information products. It has the advantages of high-speed data transmission, compact structure, flexible configuration, and good electromagnetic compatibility. Therefore, the system is very convenient to set up and use, and the application is more and more extensive. It has gradually become the preferred bus for high-performance test system integration.

The VXI bus is a fully open modular instrument backplane bus specification for each instrument manufacturer. VXI bus devices are mainly divided into: register-based devices, message-based devices, and memory-based devices. Register-based devices currently account for the largest proportion (about 70%) in applications. The VXIbus register base interface circuit mainly includes four parts: bus buffer drive, addressing and decoding circuit, data transfer response state machine, configuration and operation register set. In addition to the bus buffer driver using the 74ALS245 chip in the four parts, the rest is implemented by FPGA. A FLEX10K chip EPF10K10QC208-3 and a piece of EPROM chip EPC1441P8 are used to design and implement the corresponding software MAX+PLUSII.

1.1 bus buffer driver

This section completes the buffered reception or drive of the data, address, and control lines in the VXI backplane bus to meet the VXI specification signal requirements. For the A16/D16 devices, only the buffer drive of the backplane data buses D00 to D15 is implemented. According to the requirements of the VXI bus specification, this part is implemented by two 74LS245s, which are gated by DBEN* (generated by the data transfer response state machine).

1.2 Addressing and Decoding Circuit

The address lines include address lines A01 to A31, data strobe lines DS0* and DS1*, and long word lines LWORD*. The control line includes an address strobe line AS* and a read/write signal line WRITE*.

The design of this circuit uses the schematic design of MAX+PLUSII. Designed using existing components in the component library, two 74386 and one 74138 are used.

The function module decodes the address lines A15 to A01 and the address modification lines AM5 to AM0. When the device is addressed, it receives the address information on the address line and the address modification line, and compares it with the logical address LA7~LA0 set by the hardware address switch on this module. If the logical value on AM5~AM0 is 29H or 2DH (Because it is an A16/D16 device), the address lines A15, A14 are both 1, and the logic value on A13 ~ A06 is equal to the logical address of the module, the device is addressed strobe (CADDR * is true). The result is then sent to the next level of decoding control, by decoding the addresses A01 to A05 to select the register in the 16-bit address space.

1.3 data transmission response state machine

The data transmission bus is a set of high-speed asynchronous parallel data transmission bus, which is the main component of VMEbus system information exchange. The signal lines of the data transmission bus can be divided into three groups of address lines, data lines, and control lines.

This part of the design uses the text input design of MAX+PLUSII. Because the timing of DTACK* is more complicated, the design is implemented in AHDL language and implemented by state machine.

This function module configures the control signals in the VXI backplane bus to provide timing and control signals for the standard data transfer cycle (generating the data transfer enable signal DBEN*, the bus response signal DTACK* required for data transfer, etc.). During data transmission, the system controller first addresses the module and sets the corresponding address strobe line AS*, data strobe line DS0*, DS1*, and WRITE* signal line that controls the data transmission direction to be valid. Level. When the module detects the address match and the control lines are valid, it drives DTACK* low to confirm to the bus controller that the data has been placed on the data bus (read cycle) or has successfully received the data (write cycle) ).

1.4 Configuration Register

Each VXI bus device has a set of "configuration registers". The system host controller reads some of the basic configuration information of the VXI bus device by reading the contents of these registers, such as device type, model, manufacturer, and address space (A16, A24). , A32) and the required storage space.

The basic configuration registers of the VXI bus device are: identification register, device type register, status register, and control register.

The design of this part of the circuit uses the schematic design of MAX+PLUSII, using the 74541 chip, which creates the functional modules.

The ID, DT, and ST registers are read-only registers, and the control registers are write-only registers. In this design, the VXI bus is mainly used to control the on/off of the batch of switches. Therefore, the data can be controlled by writing data to the channel register to control the on/off state of the relay switch. The status of the relay is also read from the channel register. The data is fine. According to the design requirements of the module, the appropriate content is written in the corresponding data bits, so that the RF switch of the function module can be effectively controlled.

2 module function circuit PCB board design

Each VXI bus device has a set of "configuration registers". The system host controller reads some of the basic configuration information of the VXI bus device by reading the contents of these registers, such as device type, model, manufacturer, and address space (A16, A24). , A32) and the required storage space.

The frequency range of the RF circuit is approximately 10 kHz to 300 GHz. As the frequency increases, the RF circuit exhibits some characteristics different from the low frequency circuit and the DC circuit. Therefore, when designing the PCB of the RF circuit, special attention must be paid to the impact of the RF signal on the PCB. The RF switching circuit is controlled by the VXI bus. In order to reduce interference in the design, the cable connection is used between the bus interface circuit part and the RF switching function circuit. The following mainly introduces the design of the PCB board of the RF switching function circuit part.

2.1 Component layout

Electromagnetic compatibility (EMC) refers to the ability of an electronic system to function properly in accordance with design requirements in a defined electromagnetic environment. For RF circuit PCB design, electromagnetic compatibility requires that each circuit module does not generate electromagnetic radiation as much as possible and has certain immunity to electromagnetic interference. The layout of the components directly affects the interference and anti-interference ability of the circuit itself. It also directly affects the performance of the designed circuit.

The general principle of layout: components should be arranged in the same direction as possible, by selecting the direction of the PCB into the molten tin system to reduce or even avoid poor soldering; at least 0.5mm spacing between components to meet the melting requirements of components If the space of the PCB is allowed, the spacing of components should be as wide as possible. The rational layout of components is also a prerequisite for reasonable wiring, so it should be considered comprehensively. In this design, the relay is a channel for converting the RF signal, so the relay should be as close as possible to the signal input end and the output end, so as to minimize the length of the RF signal line, and make the next reasonable wiring. consider. In addition, the RF switching circuit is controlled by the VXI bus, and the influence of the RF signal on the VXI bus control signal is also a problem that must be considered when laying out.

2.2 wiring

After the basic layout of the components is completed, the wiring must be started. The basic principle of the wiring is: when the assembly density is allowed, the low-density wiring design should be selected as much as possible, and the signal traces should be as thick as possible to facilitate impedance matching.

For RF circuits, the unreasonable design of the direction, width and line spacing of the signal lines may cause cross-interference between the signal transmission lines. In addition, the system power supply itself also has noise interference, so it must be considered comprehensively when designing the RF circuit PCB. Reasonable wiring.

When wiring, all the traces should be away from the border of the PCB board (about 2mm), so as to avoid the hidden troubles of disconnection or disconnection when the PCB board is made. The power cable should be as wide as possible to reduce the loop resistance. At the same time, the power line and ground should be aligned in the same direction as the data transmission to improve the anti-interference ability. The signal line should be as short as possible, and the number of vias should be reduced as much as possible; the shorter the connection between the components, the better, to reduce the distribution parameters and mutual electromagnetic interference; for incompatible signal lines should be as far as possible from each other And try to avoid parallel routing, and the signal lines on both sides should be perpendicular to each other: when wiring is required, it should be 135 degree angle, avoiding the right angle.

In the above design, the PCB board uses four layers. In order to reduce the influence of the RF signal on the VXI bus control signal, the two signal traces are respectively placed in the middle two layers, and the RF signal lines are shielded by the ground via.

2.3 Power and Ground

The wiring in the RF circuit PCB design requires special emphasis on proper wiring of the power and ground lines. Reasonable choice of power and ground wiring is an important guarantee for reliable operation of the instrument. A considerable number of sources of interference on the PCB board of the RF circuit are generated by the power supply and ground, where the ground line causes the largest amount of noise interference. According to the current of the PCB board, the design of the power line and the ground line should be as thick and short as possible to reduce the loop resistance. At the same time, the direction of the power line and the ground line are consistent with the direction of data transmission, which helps to enhance the anti-noise capability. Multi-layer boards should be used as far as practicable. The four-layer board is 20 dB lower than the double-panel board, and the six-layer board is 10 dB lower than the four-layer board.

In the four-layer PCB board designed in this paper, both the top layer and the bottom layer are designed as ground layers. In this way, no matter which layer of the middle layer is the power layer, the physical relationship between the power layer and the ground layer are close to each other, forming a large decoupling capacitor, which reduces the interference caused by the ground line.

The ground layer is covered with copper in a large area. Large-scale copper plating has the following main functions:

(1) EMC. For a large area of ​​ground or power supply copper, it will play a shielding role.

(2) PCB process requirements. Generally, in order to ensure the plating effect, or the laminate is not deformed, copper is laid for the PCB layer with less wiring.

(3) Signal integrity requirements, giving a high-frequency digital signal a complete return path and reducing the wiring of the DC network.

(4) Heat dissipation, special device installation requires copper plating and so on.

3 Conclusion

The VXI bus system is a modular instrument bus system that is completely open worldwide and suitable for multiple manufacturers. It is the latest instrument bus system in the world. The above mainly introduces the development of RF switching module based on VXI bus. The design of the bus interface and the design of the PCB board of the functional circuit part of the RF switch module are introduced. The RF switch is controlled by the VXI bus, which increases the flexibility of the switch operation and is easy to use.